16.2 Registers and counters

Shift Registers

Types of Shift Registers

A shift register is a group of flip-flops connected in a chain that stores a sequence of bits and shifts them one position in a specified direction on each clock pulse. The number of flip-flops determines how many bits the register can hold. A 4-bit shift register, for example, uses four flip-flops and stores four bits.

There are several configurations, each defined by how data enters and exits:

• Serial-In Serial-Out (SISO): Data enters one bit at a time and exits one bit at a time from the opposite end. This is the simplest type and is useful for creating time delays in a signal path.
• Serial-In Parallel-Out (SIPO): Data enters one bit per clock pulse, but once the register is full, all bits are available simultaneously at the outputs. This converts a serial data stream into parallel format.
• Parallel-In Serial-Out (PISO): All bits are loaded into the register at once, then shifted out one bit at a time. This converts parallel data into serial format, which is common in serial communication interfaces.
• Universal shift register: Can perform SISO, SIPO, PISO, and parallel-in parallel-out operations, and can shift data left or right. Mode-select inputs determine which operation it performs on a given clock cycle.

Applications of Shift Registers

Shift registers appear wherever you need to store data temporarily, introduce a controlled delay, or convert between serial and parallel formats. Serial-to-parallel and parallel-to-serial conversion is probably the most common use; any time a microcontroller sends data over a serial bus to a device that needs parallel input, a shift register handles that translation.

Other applications include:

• Ring counters and Johnson counters (covered below), which are shift registers with feedback
• Pseudo-random number generators, where specific feedback taps produce a long, seemingly random bit sequence (called a linear feedback shift register, or LFSR)
• Simple state machines and sequence generators, where the shifting pattern encodes the current state

Synchronous and Asynchronous Counters

Counters are sequential circuits that cycle through a defined sequence of states, typically representing binary numbers. The two main categories differ in how the clock signal reaches each flip-flop.

Asynchronous Counters

An asynchronous counter (also called a ripple counter) chains its flip-flops so that the output of one flip-flop drives the clock input of the next. Only the first flip-flop receives the external clock signal directly.

Because each flip-flop must wait for the previous one to toggle before it can respond, propagation delay accumulates through the chain. In a 4-bit ripple counter, the last flip-flop changes state three propagation delays after the first. This accumulated delay limits the maximum operating frequency and can cause brief incorrect outputs (glitches) while the counter is still settling.

The upside is simplicity: asynchronous counters need fewer components and no extra combinational logic, making them easy to build for low-speed applications.

Synchronous Counters

A synchronous counter connects all flip-flops to the same clock signal, so every flip-flop evaluates its input and transitions state at the same moment. This eliminates the cumulative propagation delay problem and allows faster, glitch-free operation.

The trade-off is that you need additional combinational logic (AND gates, for instance) to determine which flip-flops should toggle on each clock edge. For a 4-bit synchronous up counter, the second flip-flop toggles only when the first is high, the third toggles only when both the first and second are high, and so on.

Synchronous counters are the standard choice for applications requiring precise timing, such as frequency dividers, event counters, and digital clocks.

Counter Types

Up and Down Counters

• An up counter increments by one on each clock pulse, counting from 0 up to its maximum value (for a 4-bit counter, that's 0 through 15, or $0000$ to $1111$ in binary), then wraps back to 0.
• A down counter decrements by one on each clock pulse, counting from its maximum value down to 0, then wraps back to the maximum.
• An up/down counter has a direction control input that selects whether the counter increments or decrements on the next clock edge. This is useful in applications like position tracking, where movement can go in either direction.

All three can be built in either asynchronous or synchronous form, though synchronous designs are more common when reliability matters.

Ring Counters

A ring counter is a shift register with feedback: the output of the last flip-flop connects back to the input of the first, forming a loop. You initialize it with exactly one flip-flop set to 1 and the rest set to 0. On each clock pulse, that single 1 shifts to the next position.

A 4-bit ring counter cycles through four states:

$1000 \rightarrow 0100 \rightarrow 0010 \rightarrow 0001 \rightarrow 1000 \rightarrow \ldots$

Because only one output is active at a time, ring counters are natural fits for round-robin scheduling, time-division multiplexing, and simple sequencing tasks. The downside is that an $n$-bit ring counter only has $n$ unique states, compared to $2^n$ states for a standard binary counter. A related variant, the Johnson counter, feeds back the complement of the last output, doubling the number of unique states to $2n$.