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12.3 FET amplifier configurations

12.3 FET amplifier configurations

Written by the Fiveable Content Team • Last updated August 2025
Written by the Fiveable Content Team • Last updated August 2025
🔌Intro to Electrical Engineering
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FET amplifiers come in three main configurations: common-source, source follower (common-drain), and common-gate. Each configuration offers a different combination of voltage gain, input impedance, and output impedance, which determines where it fits best in a circuit design.

Understanding these configurations lets you pick the right topology for a given job and predict how it will behave using small-signal analysis.

FET Amplifier Types

Common-Source Amplifier Configuration

The common-source (CS) amplifier is the workhorse of FET amplifier design. It's the go-to when you need high voltage gain and high input impedance.

  • The input signal is applied to the gate, the source is tied to ground (or to ground through a resistor), and the output is taken from the drain across a load resistor RDR_D.
  • It inverts the signal: a positive-going input produces a negative-going output, giving a negative voltage gain.
  • A source resistor RSR_S is often added for DC biasing stability. For AC analysis, RSR_S is typically bypassed with a capacitor so it doesn't reduce the gain.
  • If you've seen the common-emitter BJT amplifier, the CS amplifier plays the same role in FET circuits.
Common-Source Amplifier Configuration, MOSFET Common Source Analysis Basics - Electrical Engineering Stack Exchange

Source Follower and Common-Gate Amplifiers

Source Follower (Common-Drain)

The source follower applies the input at the gate and takes the output from the source, with the drain tied to the supply.

  • Voltage gain is slightly less than 1 (close to unity), so it doesn't amplify voltage. Its job is impedance matching: high input impedance in, low output impedance out.
  • Think of it as a buffer. You'd place it between a high-impedance source and a low-impedance load to avoid signal loss.
  • The output follows the input (in phase, nearly the same amplitude), which is why it's called a "follower."

Common-Gate

The common-gate amplifier applies the input at the source and takes the output from the drain, with the gate held at AC ground.

  • It has low input impedance (roughly 1/gm1/g_m) and high output impedance.
  • Voltage gain can be significant, similar in magnitude to the common-source configuration.
  • Low input impedance makes it useful in RF circuits where you need to match a low-impedance signal source (like a 50 Ω antenna). It also shows up as the upper stage in a cascode amplifier, where it improves bandwidth and isolation.
Common-Source Amplifier Configuration, JFET Amplifiers – Semiconductor Devices: Theory and Application Lab Manual

Amplifier Characteristics

Voltage Gain, Input Impedance, and Output Impedance

Here's a quick comparison of the three configurations:

ParameterCommon-SourceSource FollowerCommon-Gate
Voltage gain (AvA_v)High (gmRD-g_m R_D)≈ 1High (gmRDg_m R_D)
Input impedanceHighHighLow (1/gm\approx 1/g_m)
Output impedanceHigh (RD\approx R_D)Low (1/gm\approx 1/g_m)High (RD\approx R_D)
PhaseInverted (180°)In phase (0°)In phase (0°)
  • Voltage gain (AvA_v) is the ratio of output voltage to input voltage. The common-source gain is negative because the output is inverted. The common-gate gain is positive with a similar magnitude.
  • Input impedance (ZinZ_{in}) is what the signal source "sees." The gate of a MOSFET draws essentially no DC current because it's insulated from the channel by the gate oxide, so any configuration driven at the gate has very high ZinZ_{in}. The common-gate configuration is driven at the source, so its ZinZ_{in} is much lower.
  • Output impedance (ZoutZ_{out}) is what the load "sees." The source follower's low ZoutZ_{out} is exactly why it works well as a buffer.

Small-Signal Model and Analysis

To predict gain and impedance without simulating the full nonlinear transistor, you use a small-signal model. This model is valid when the AC signal is small enough that the FET operates in a roughly linear region around its DC bias point.

The key steps for small-signal analysis:

  1. Find the DC operating point. Solve for IDI_D, VGSV_{GS}, and VDSV_{DS} using the bias circuit. This sets the value of gmg_m.
  2. Replace the FET with its small-signal equivalent. The FET becomes a voltage-controlled current source: gmvgsg_m v_{gs}, where gmg_m is the transconductance. Optionally include the output resistance ror_o (models channel-length modulation) in parallel with the current source.
  3. Zero all DC sources. Replace DC voltage supplies with short circuits and DC current supplies with open circuits. Coupling and bypass capacitors become short circuits at signal frequencies.
  4. Analyze the resulting linear circuit. Apply Kirchhoff's voltage and current laws to solve for AvA_v, ZinZ_{in}, and ZoutZ_{out}.

The transconductance gmg_m is defined as:

gm=IDVGSg_m = \frac{\partial I_D}{\partial V_{GS}}

For a MOSFET biased in saturation, gm=2ID/(VGSVth)g_m = 2I_D / (V_{GS} - V_{th}), where VthV_{th} is the threshold voltage. A larger bias current or a smaller overdrive voltage (VGSVthV_{GS} - V_{th}) gives a higher gmg_m, which directly increases voltage gain in the common-source and common-gate configurations.

The model also includes parasitic capacitances (CgsC_{gs}, CgdC_{gd}, CdsC_{ds}) that matter at higher frequencies, but for a first pass at midband gain and impedance, you can ignore them.