8.4 Small-signal models and parameters

Small-signal models let you replace a nonlinear transistor with a simple linear circuit that's valid for small AC signals riding on top of a DC bias. This is what makes pencil-and-paper amplifier analysis possible: instead of wrestling with exponential or square-law I-V curves, you work with resistors, capacitors, and controlled sources.

Since this unit covers MOSFETs, the focus here is on FET small-signal parameters. BJT equivalents are included for comparison where helpful, but the MOSFET is the main event.

Small-signal equivalent circuit

A small-signal equivalent circuit replaces the transistor with linear elements that capture its behavior for signals much smaller than the DC bias voltages. You derive it by linearizing the device equations around the Q-point (the DC operating point). Once you have this circuit, you can use standard techniques like KVL, KCL, and superposition to find gains and impedances.

MOSFET small-signal model

The basic low-frequency MOSFET model has three elements:

• A voltage-controlled current source $g_m v_{gs}$ between drain and source, representing how gate voltage controls drain current
• An output resistance $r_o$ in parallel with that current source, accounting for channel-length modulation
• The gate draws essentially zero DC current, so there's no input resistance element at low frequencies (the gate looks like an open circuit)

At high frequencies, you add capacitors $C_{gs}$, $C_{gd}$, and $C_{ds}$ between the respective terminals. This is sometimes called the high-frequency small-signal model.

Hybrid-pi model

The hybrid-pi model is the standard small-signal model for BJTs. It consists of:

• A voltage-controlled current source $g_m v_{\pi}$
• An input resistance $r_{\pi}$ between base and emitter
• An output resistance $r_o$ between collector and emitter

The MOSFET small-signal model is actually a simplified version of the hybrid-pi: set $r_{\pi} \to \infty$ (because the insulated gate draws no current), and you get the MOSFET model.

Y-parameters

Y-parameters provide a matrix representation of any two-port network's small-signal behavior. The admittance parameters $y_{11}, y_{12}, y_{21}, y_{22}$ relate input/output currents to input/output voltages:

$\begin{bmatrix} I_1 \\ I_2 \end{bmatrix} = \begin{bmatrix} y_{11} & y_{12} \\ y_{21} & y_{22} \end{bmatrix} \begin{bmatrix} V_1 \\ V_2 \end{bmatrix}$

This approach is especially useful in RF and microwave circuit design (e.g., low-noise amplifiers), where you need to cascade stages and analyze stability systematically.

Transconductance

Transconductance is the single most important small-signal parameter. It tells you how effectively the gate (or base) voltage controls the output current.

Definition of transconductance

Transconductance $g_m$ is the ratio of a small change in output current to the small change in input voltage that caused it, measured in siemens (S).

For a MOSFET in saturation:

$g_m = \frac{\partial I_D}{\partial V_{GS}}$

For a BJT (for comparison):

$g_m = \frac{\partial I_C}{\partial V_{BE}}$

Higher $g_m$ means more output current swing per volt of input, which translates directly to higher voltage gain in amplifier circuits.

Transconductance vs. bias current

The relationship between $g_m$ and bias current differs between MOSFETs and BJTs, and this difference has real design consequences.

For MOSFETs in saturation:

$g_m = \frac{2I_D}{V_{GS} - V_{th}} = \sqrt{2 \mu_n C_{ox} \frac{W}{L} I_D}$

Notice that $g_m$ is proportional to $\sqrt{I_D}$. Doubling the drain current only increases $g_m$ by a factor of $\sqrt{2} \approx 1.41$. You can also increase $g_m$ by making the transistor wider (increasing $W/L$).

For BJTs:

$g_m = \frac{I_C}{V_T}$

Here $V_T \approx 26 \text{ mV}$ at room temperature. BJT $g_m$ is directly proportional to $I_C$, which is why BJTs generally offer higher transconductance per unit bias current than MOSFETs.

Measurement of transconductance

To measure $g_m$:

1. Bias the device at the desired Q-point
2. Apply a small AC voltage to the gate-source (or base-emitter) terminal
3. Measure the resulting AC drain (or collector) current
4. Calculate $g_m$ as the ratio of AC output current to AC input voltage

Network analyzers automate this process and provide accurate results across frequency.

Input resistance

Input resistance describes how much the device loads the signal source driving it.

Definition of input resistance

For a MOSFET, the gate is insulated from the channel by a thin oxide layer. At low frequencies, the gate current is essentially zero, so the input resistance $r_{gs}$ is extremely high, typically in the range of $10^{12} \, \Omega$ or more. This is one of the major advantages of MOSFETs over BJTs: they barely load the input source.

For a BJT, the input resistance is:

$r_{\pi} = \frac{v_{be}}{i_b} = \frac{\beta}{g_m} = \frac{\beta V_T}{I_C}$

This is finite and inversely proportional to bias current. A BJT biased at $I_C = 1 \text{ mA}$ with $\beta = 100$ gives $r_{\pi} = \frac{100 \times 26 \text{ mV}}{1 \text{ mA}} = 2.6 \text{ k}\Omega$.

Input resistance at high frequencies

At high frequencies, the MOSFET's input impedance drops because of $C_{gs}$ and $C_{gd}$. The gate no longer looks like an open circuit. This is why high-frequency MOSFET models must include these capacitances.

Measurement of input resistance

1. Apply a small AC voltage to the input terminal
2. Measure the resulting AC input current
3. Calculate input resistance as the ratio of input voltage to input current
4. De-embed parasitic impedances from probe pads and interconnects for accurate results

Output resistance

Output resistance determines how much the output current changes when the output voltage changes. It directly affects voltage gain.

Definition of output resistance

$r_o = \frac{\partial V_{DS}}{\partial I_D} \bigg|_{V_{GS}=\text{const}}$ for MOSFETs

$r_o = \frac{\partial V_{CE}}{\partial I_C} \bigg|_{V_{BE}=\text{const}}$ for BJTs

An ideal current source has infinite output resistance. Real transistors fall short of this, and $r_o$ captures that non-ideality. Higher $r_o$ means the transistor behaves more like an ideal current source, which generally improves amplifier voltage gain.

Output resistance vs. bias current

For MOSFETs:

$r_o = \frac{1}{\lambda I_D}$

where $\lambda$ is the channel-length modulation parameter. Longer channels (larger $L$) give smaller $\lambda$ and therefore higher $r_o$.

For BJTs:

$r_o = \frac{V_A}{I_C}$

where $V_A$ is the Early voltage.

In both cases, increasing bias current decreases output resistance. This creates a design trade-off: higher bias current gives you more $g_m$ (and thus more gain), but it also lowers $r_o$ (which reduces gain). The intrinsic gain of a MOSFET, $A_i = g_m r_o$, captures this trade-off in a single figure of merit.

Measurement of output resistance

1. Hold the input voltage constant at the DC bias value
2. Apply a small AC current to the output terminal
3. Measure the resulting AC output voltage
4. Calculate $r_o$ as the ratio of output voltage to output current

Capacitances

Device capacitances are what limit high-frequency performance. Understanding where they come from helps you design around them.

Depletion layer capacitance

Depletion layer capacitance $C_j$ comes from the voltage-dependent width of the depletion region at a p-n junction (or at the oxide-semiconductor interface in a MOSFET). For a p-n junction:

$C_j = \frac{C_{j0}}{\left(1 - \frac{V}{V_0}\right)^m}$

where $C_{j0}$ is the zero-bias capacitance, $V_0$ is the built-in potential, and $m$ is a grading coefficient ($m = 0.5$ for an abrupt junction). In MOSFETs, this capacitance appears at the drain-body and source-body junctions.

Oxide capacitance and overlap capacitances

The gate oxide capacitance is central to MOSFET operation. The total gate capacitance depends on the operating region:

• In saturation, $C_{gs} \approx \frac{2}{3} W L C_{ox}$ and $C_{gd}$ is small (mainly overlap capacitance)
• In the linear region, $C_{gs} \approx C_{gd} \approx \frac{1}{2} W L C_{ox}$

Overlap capacitances arise where the gate electrode overlaps the source and drain diffusion regions. These are bias-independent and add to $C_{gs}$ and $C_{gd}$.

Diffusion capacitance

Diffusion capacitance $C_d$ is associated with charge stored in the neutral regions of a forward-biased junction:

$C_d = \frac{\tau I}{V_T}$

where $\tau$ is the minority carrier lifetime. This is more relevant in BJTs (at the base-emitter junction) than in MOSFETs, but it can appear at forward-biased body-source junctions.

Parasitic capacitances

Beyond the intrinsic device capacitances, layout-dependent parasitics matter in real designs:

• Gate-drain capacitance $C_{gd}$: particularly important because the Miller effect amplifies its impact
• Drain-source capacitance $C_{ds}$: usually smaller but still relevant at very high frequencies
• Interconnect and pad capacitances: can dominate in some layouts

Careful layout with minimum drain area and shielding techniques helps minimize these.

Frequency response

Cutoff frequency

The unity-gain frequency $f_T$ is the frequency where the short-circuit current gain drops to 1. For a MOSFET:

$f_T = \frac{g_m}{2\pi(C_{gs} + C_{gd})}$

This tells you the ultimate speed limit of the transistor. For a typical 180 nm NMOS, $f_T$ might be around 40-60 GHz. Shorter channels and higher $g_m$ push $f_T$ higher.

Gain-bandwidth product

For a single-pole amplifier, the gain-bandwidth product (GBW) is constant:

$\text{GBW} = |A_v| \times f_{-3\text{dB}}$

If you increase the gain, the bandwidth shrinks proportionally, and vice versa. This is a fundamental trade-off in amplifier design. For a common-source amplifier, GBW is approximately $\frac{g_m}{2\pi C_L}$ where $C_L$ is the dominant load capacitance.

Miller effect

The Miller effect is one of the most important high-frequency phenomena in amplifier design. When a capacitance $C_{gd}$ bridges the input and output of an inverting amplifier with voltage gain $A_v$, it appears at the input as:

$C_{M} = (1 + |A_v|) C_{gd}$

For an amplifier with a gain of -10 and $C_{gd} = 0.5 \text{ fF}$, the Miller capacitance at the input is $11 \times 0.5 = 5.5 \text{ fF}$. This dramatically reduces the input pole frequency and limits bandwidth.

Techniques to reduce the Miller effect:

• Cascoding: inserting a common-gate stage to reduce the voltage gain across $C_{gd}$
• Neutralization: adding a cross-coupled capacitor to cancel $C_{gd}$
• Layout optimization: minimizing the physical overlap that creates $C_{gd}$

Small-signal analysis

AC equivalent circuit

To build the AC equivalent circuit from a full schematic:

1. Set all DC sources to zero (voltage sources become short circuits, current sources become open circuits)
2. Replace each transistor with its small-signal model
3. Replace coupling and bypass capacitors with short circuits (they're chosen to have negligible impedance at the signal frequency)
4. Keep any resistors that carry signal current

The result is a linear circuit you can solve with standard methods.

Analyzing a common-source amplifier

As a concrete example, consider a common-source MOSFET amplifier with a drain resistor $R_D$ and load $R_L$:

1. Replace the MOSFET with its small-signal model: $g_m v_{gs}$ current source and $r_o$ in parallel
2. The voltage gain is: $A_v = -g_m (R_D \| r_o \| R_L)$
3. The input resistance is essentially infinite (gate is insulated)
4. The output resistance looking back into the drain is $R_D \| r_o$

The negative sign indicates phase inversion: the common-source stage is an inverting amplifier.

Y-parameter analysis

Y-parameter analysis treats the transistor as a two-port network. You can:

• Derive the Y-matrix from the small-signal model by applying test voltages and calculating currents
• Measure the Y-parameters directly with a network analyzer
• Extract parameters like input/output impedance, forward transconductance ($y_{21} \approx g_m$), and reverse transfer admittance ($y_{12}$, related to $C_{gd}$)

This approach is standard for RF circuit design where S-parameters (closely related to Y-parameters) are the primary design tool.

Noise in small-signal models

Noise sets the lower limit on the signals a circuit can process. Each noise source gets added to the small-signal model as an independent random source.

Thermal noise

Thermal noise comes from random thermal motion of carriers in any resistive element. The noise voltage across a resistance $R$ is:

$\overline{v_n^2} = 4kTRB$

where $k$ is Boltzmann's constant ($1.38 \times 10^{-23} \text{ J/K}$), $T$ is temperature in kelvin, and $B$ is bandwidth. In a MOSFET, the channel resistance contributes thermal noise modeled as a drain current noise source:

$\overline{i_{nd}^2} = 4kT \gamma g_m B$

where $\gamma$ is a bias-dependent factor ($\gamma = 2/3$ for long-channel devices, higher for short channels).

Shot noise

Shot noise arises from the discrete nature of charge carriers crossing a potential barrier. The noise current is:

$\overline{i_n^2} = 2qIB$

where $q = 1.6 \times 10^{-19} \text{ C}$. Shot noise is more prominent in BJTs (where carriers cross the base-emitter junction) than in MOSFETs, though it appears in MOSFET gate leakage current at very small oxide thicknesses.

Flicker noise (1/f noise)

Flicker noise has a power spectral density that increases as frequency decreases, following a $1/f$ pattern. It's caused by carrier trapping and de-trapping at the oxide-semiconductor interface.

MOSFETs have significantly more flicker noise than BJTs because current flows right along the oxide interface where traps are concentrated. This makes BJTs preferred for low-frequency, low-noise applications. For MOSFETs, using larger gate areas (bigger $W \times L$) reduces flicker noise because the random trapping events average out over more carriers.

Applications of small-signal models

Amplifier design

Small-signal models let you predict amplifier performance before building anything. For a common-source amplifier, you can calculate:

• Voltage gain: $A_v = -g_m(R_D \| r_o)$
• Input impedance: very high (gate is insulated)
• Output impedance: $R_D \| r_o$
• Bandwidth: determined by the dominant pole, often set by the Miller-multiplied $C_{gd}$

Techniques like cascoding (stacking a common-gate on a common-source) boost both gain and bandwidth by increasing effective output resistance while suppressing the Miller effect.

Oscillator design

For a circuit to oscillate, the Barkhausen criterion must be met: the loop gain must equal unity, and the total phase shift around the loop must be $360°$ (or equivalently $0°$). Small-signal models let you calculate the loop gain and phase to verify that oscillation will start and to predict the oscillation frequency.

Mixer design

Mixers perform frequency translation by exploiting the nonlinearity (or time-varying nature) of transistor characteristics. While mixers inherently operate in a large-signal regime for the local oscillator, small-signal models are used to analyze the RF signal path. Key performance metrics like conversion gain, noise figure, and port-to-port isolation can be estimated using linearized models around the time-varying operating point.