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5.1 p-n junction formation and built-in potential

5.1 p-n junction formation and built-in potential

Written by the Fiveable Content Team • Last updated August 2025
Written by the Fiveable Content Team • Last updated August 2025
🧗‍♀️Semiconductor Physics
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P-n junctions are the backbone of semiconductor devices. When p-type and n-type materials meet, charge carriers flow between them, creating a depletion region and built-in potential.

Understanding p-n junction formation is key to grasping how diodes, transistors, and solar cells work. This guide covers carrier diffusion, space charge regions, energy barriers, and the quantitative tools you need to analyze these junctions.

Formation of p-n junctions

A p-n junction forms when p-type and n-type semiconductors are brought into contact, allowing charge carriers to redistribute across the interface. This redistribution is the physical origin of everything that makes diodes and transistors work.

Bringing p-type and n-type semiconductors into contact

Before contact, each side has its own distinct properties:

  • P-type semiconductors are doped with acceptor impurities. Holes are the majority carriers, and the Fermi level sits closer to the valence band.
  • N-type semiconductors are doped with donor impurities. Electrons are the majority carriers, and the Fermi level sits closer to the conduction band.

When these two materials are joined, a massive concentration gradient exists at the interface. The p-side is full of holes but has very few electrons; the n-side is the opposite. This gradient is what drives the next step: diffusion.

Diffusion of majority carriers

Because of the concentration gradient across the junction, majority carriers diffuse across the boundary:

  1. Holes diffuse from the p-side into the n-side. Each hole that leaves exposes a negatively charged acceptor ion (fixed in the crystal lattice) near the junction on the p-side.
  2. Electrons diffuse from the n-side into the p-side. Each electron that leaves exposes a positively charged donor ion near the junction on the n-side.
  3. These exposed ions can't move. They form a growing region of fixed charge on both sides of the junction.
  4. Diffusion continues until the resulting electric field is strong enough to stop it.

Drift current and electric field

As diffusion exposes more and more ionized impurities, a space charge region builds up near the junction: positive donor ions on the n-side, negative acceptor ions on the p-side.

This space charge creates an electric field directed from the n-side toward the p-side. The field opposes further diffusion of majority carriers. At the same time, it sweeps minority carriers (electrons on the p-side, holes on the n-side) in the opposite direction, producing a drift current.

The drift current flows opposite to the diffusion current. As the space charge region grows, the electric field strengthens, the drift current increases, and eventually the two currents balance.

Equilibrium condition in p-n junctions

At thermal equilibrium, three things are true simultaneously:

  • The diffusion current and drift current are equal and opposite, so the net current across the junction is zero.
  • The Fermi level is constant throughout the entire structure. This is the defining condition of thermal equilibrium.
  • A built-in potential VbiV_{bi} exists across the junction, creating an energy barrier that prevents further net flow of majority carriers.

The Fermi level alignment is what "locks in" the built-in potential. Before contact, the p-side and n-side had different Fermi levels. After contact, carrier redistribution shifts the bands until the Fermi levels line up.

Depletion region in p-n junctions

The depletion region (also called the space charge region) is the zone near the junction that has been swept free of mobile carriers. Its width and properties directly determine the electrical characteristics of the device.

Depletion of majority carriers

When majority carriers diffuse across the junction, they leave behind a region stripped of free carriers. On the p-side, the remaining negative acceptor ions are immobile. On the n-side, the remaining positive donor ions are immobile. This carrier-depleted zone extends into both sides of the junction.

Space charge region

The fixed ions in the depletion region create a net charge distribution: positive on the n-side, negative on the p-side. This charge distribution produces the internal electric field that opposes diffusion and drives the drift of minority carriers. At equilibrium, the drift current from this field exactly cancels the diffusion current.

Depletion region width

For an abrupt p-n junction (where doping changes sharply at the boundary), the total depletion width WW is:

W=2εq(NA+NDNAND)(VbiVa)W = \sqrt{\frac{2\varepsilon}{q}\left(\frac{N_A + N_D}{N_A N_D}\right)(V_{bi} - V_a)}

where:

  • ε\varepsilon = permittivity of the semiconductor
  • qq = elementary charge (1.6×10191.6 \times 10^{-19} C)
  • NAN_A = acceptor doping concentration
  • NDN_D = donor doping concentration
  • VbiV_{bi} = built-in potential
  • VaV_a = applied voltage (positive for forward bias, negative for reverse bias)

Notice the factor NA+NDNAND\frac{N_A + N_D}{N_A N_D}. If one side is doped much more heavily than the other (say NANDN_A \gg N_D), this simplifies to approximately 1ND\frac{1}{N_D}, meaning the depletion region extends mostly into the lightly doped side.

Factors affecting depletion width

  • Doping concentrations: Higher doping on both sides produces a narrower depletion region. Lower doping gives a wider one. The depletion region always extends further into the more lightly doped side.
  • Applied voltage: Reverse bias increases WW (the (VbiVa)(V_{bi} - V_a) term grows when VaV_a is negative). Forward bias decreases WW.
  • Temperature: Higher temperature slightly increases WW because thermal generation adds carriers and modifies VbiV_{bi}.
  • Material properties: The semiconductor's permittivity ε\varepsilon directly affects WW. A higher permittivity means a wider depletion region for the same doping and voltage.
Bringing p-type and n-type semiconductors into contact, PN Junction Theory - Electronics-Lab.com

Built-in potential in p-n junctions

The built-in potential VbiV_{bi} is the voltage that develops across the junction at equilibrium. You can't measure it directly with a voltmeter (the contact potentials at the metal-semiconductor interfaces cancel it out), but it governs carrier transport and sets the energy barrier height.

Origin of built-in potential

Before contact, the p-type and n-type materials have different Fermi levels. When they're joined, carriers redistribute until the Fermi levels align. This alignment forces the energy bands to bend, and the resulting potential difference across the junction is VbiV_{bi}.

The built-in potential acts as a barrier: majority carriers on either side need enough energy to climb over it in order to cross the junction. At equilibrium, only a tiny fraction of carriers have that energy, so the net flow is zero.

Fermi level alignment

In the isolated p-type material, the Fermi level is near the valence band. In the isolated n-type material, it's near the conduction band. The difference between these two Fermi levels (before contact) is directly related to the built-in potential.

When the junction forms, electrons flow from n to p and holes flow from p to n until the Fermi level is flat across the entire structure. The band edges (conduction and valence bands) must then bend to accommodate this flat Fermi level, and the amount of bending equals qVbiqV_{bi}.

Calculation of built-in potential

The built-in potential is given by:

Vbi=kTqln(NANDni2)V_{bi} = \frac{kT}{q}\ln\left(\frac{N_A N_D}{n_i^2}\right)

where:

  • kk = Boltzmann constant (1.38×10231.38 \times 10^{-23} J/K)
  • TT = absolute temperature (K)
  • qq = elementary charge
  • NAN_A, NDN_D = acceptor and donor doping concentrations
  • nin_i = intrinsic carrier concentration of the semiconductor

Example: For a silicon junction at 300 K with NA=1017N_A = 10^{17} cm3^{-3}, ND=1015N_D = 10^{15} cm3^{-3}, and ni=1.5×1010n_i = 1.5 \times 10^{10} cm3^{-3}:

Vbi=(1.38×1023)(300)1.6×1019ln(1017×1015(1.5×1010)2)0.026×ln(4.44×1011)0.70 VV_{bi} = \frac{(1.38 \times 10^{-23})(300)}{1.6 \times 10^{-19}}\ln\left(\frac{10^{17} \times 10^{15}}{(1.5 \times 10^{10})^2}\right) \approx 0.026 \times \ln(4.44 \times 10^{11}) \approx 0.70 \text{ V}

Typical silicon p-n junctions have VbiV_{bi} values in the range of 0.6 to 0.9 V, depending on doping levels.

Dependence on doping concentrations

  • Increasing either NAN_A or NDN_D raises VbiV_{bi}, because the Fermi levels start farther apart before contact.
  • The dependence is logarithmic, so doubling the doping doesn't double the built-in potential. You need to change doping by orders of magnitude to see a significant shift in VbiV_{bi}.
  • This is in contrast to the depletion width, which depends on doping through a square-root relationship and is therefore more sensitive to doping changes.

Energy band diagram of p-n junctions

Energy band diagrams are the primary visual tool for understanding what's happening inside a junction. They show how the conduction band edge EcE_c, valence band edge EvE_v, and Fermi level EFE_F vary with position.

Band bending in equilibrium

At equilibrium, the Fermi level must be flat (constant) across the entire junction. Since the p-side has its Fermi level near the valence band and the n-side has it near the conduction band, the bands must bend through the depletion region to connect the two sides while keeping EFE_F flat.

The bands bend upward going from the n-side to the p-side. This upward bending for electrons represents the energy barrier they must overcome to diffuse from n to p. The total band bending equals qVbiqV_{bi}.

Electron and hole energy barriers

The band bending creates energy barriers for both carrier types:

  • Electrons trying to move from the n-side to the p-side face an uphill climb in the conduction band. The barrier height is qVbiqV_{bi} as seen from the conduction band perspective.
  • Holes trying to move from the p-side to the n-side face a downhill drop in the valence band (which is energetically uphill for holes, since holes have lower energy when the band is higher). The barrier is also related to qVbiqV_{bi}.

These barriers prevent the net flow of majority carriers at equilibrium.

Relation between built-in potential and energy barriers

The electron and hole energy barriers (ϕn\phi_n and ϕp\phi_p) are related to the built-in potential and the Fermi level positions:

ϕn=qVbi(EFEv)p\phi_n = qV_{bi} - (E_F - E_v)_p

ϕp=(EcEF)nqVbi\phi_p = (E_c - E_F)_n - qV_{bi}

where the subscripts nn and pp refer to the respective bulk regions far from the junction.

The sum of these barriers equals the bandgap:

ϕn+ϕp=Eg\phi_n + \phi_p = E_g

This makes sense: the total energy span from the valence band on one side to the conduction band on the other is always the bandgap, regardless of how the built-in potential divides it.

Bringing p-type and n-type semiconductors into contact, p–n junction - Wikipedia, the free encyclopedia

Quasi-Fermi levels under bias

When a voltage is applied, the junction is no longer in equilibrium, and a single Fermi level can no longer describe the system. Instead, two quasi-Fermi levels are used:

  • EFnE_{Fn} for electrons
  • EFpE_{Fp} for holes

The separation between the quasi-Fermi levels at the junction equals the applied voltage:

qVa=EFnEFpqV_a = E_{Fn} - E_{Fp}

Under forward bias, EFn>EFpE_{Fn} > E_{Fp} at the junction, meaning excess carriers are being injected. Under reverse bias, the quasi-Fermi levels can cross in the depletion region, reflecting carrier extraction. Quasi-Fermi levels are essential for analyzing current flow in non-equilibrium conditions.

Charge neutrality in p-n junctions

Charge neutrality ensures that the total positive charge in the depletion region exactly balances the total negative charge. This constraint, combined with Poisson's equation, lets you solve for the electric field and potential profiles inside the junction.

Charge distribution in depletion region

Within the depletion region, mobile carriers have been swept away, leaving only fixed ionic charges. The p-side of the depletion region has a net negative charge density (from ionized acceptors), and the n-side has a net positive charge density (from ionized donors). Outside the depletion region, the semiconductor is electrically neutral because mobile carriers screen the dopant ions.

Ionized donors and acceptors

In the depletion region, the electric field has swept away the free carriers, exposing the dopant ions:

  • Ionized donors (ND+N_D^+) on the n-side are positively charged. Each donor atom contributed one electron to the conduction band and is now a fixed positive charge.
  • Ionized acceptors (NAN_A^-) on the p-side are negatively charged. Each acceptor atom captured one electron from the valence band (equivalently, created a hole) and is now a fixed negative charge.

In the depletion approximation, you assume complete ionization and an abrupt transition from depleted to neutral regions.

Charge neutrality condition

The total positive charge on the n-side must equal the total negative charge on the p-side:

xp0ρp(x)dx=0xnρn(x)dx\int_{-x_p}^{0} \rho_p(x)\,dx = -\int_{0}^{x_n} \rho_n(x)\,dx

For an abrupt junction with uniform doping, this simplifies to:

NAxp=NDxnN_A \cdot x_p = N_D \cdot x_n

This tells you something important: the depletion region extends further into the lightly doped side. If NDNAN_D \gg N_A, then xpxnx_p \gg x_n, and nearly all the depletion region is on the p-side.

Poisson's equation in depletion region

Poisson's equation connects the charge distribution to the electrostatic potential:

d2ϕdx2=ρ(x)ε\frac{d^2\phi}{dx^2} = -\frac{\rho(x)}{\varepsilon}

Solving this equation within the depletion region (using the depletion approximation where ρ=qND\rho = qN_D on the n-side and ρ=qNA\rho = -qN_A on the p-side) gives you:

  1. The electric field profile E(x)E(x), which is triangular, peaking at the metallurgical junction.
  2. The potential profile ϕ(x)\phi(x), which varies quadratically through the depletion region.
  3. Boundary conditions: the electric field goes to zero at the edges of the depletion region (x=xpx = -x_p and x=xnx = x_n), and the total potential drop equals VbiVaV_{bi} - V_a.

These solutions are the foundation for deriving the depletion width formula and the capacitance expressions.

Capacitance of p-n junctions

P-n junctions store charge in the depletion region, and this charge changes with applied voltage. That voltage-dependent charge storage is capacitance, and it has practical applications in varactor diodes and voltage-controlled oscillators.

Depletion capacitance

The depletion region behaves like a parallel-plate capacitor. The "plates" are the edges of the depletion region (where mobile charge begins), and the "dielectric" is the depleted semiconductor between them.

CD=εAWC_D = \frac{\varepsilon A}{W}

where AA is the junction cross-sectional area and WW is the depletion width. Since WW depends on voltage, so does CDC_D.

Variation with applied voltage

Substituting the expression for WW into the capacitance formula gives the voltage dependence:

CD=C01VaVbiC_D = \frac{C_0}{\sqrt{1 - \frac{V_a}{V_{bi}}}}

where C0C_0 is the zero-bias depletion capacitance.

  • Reverse bias (Va<0V_a < 0): The denominator grows, so CDC_D decreases. The depletion region widens, moving the "plates" farther apart.
  • Forward bias (0<Va<Vbi0 < V_a < V_{bi}): The denominator shrinks, so CDC_D increases. The depletion region narrows.

This tunability is exactly what makes varactor diodes useful as voltage-controlled capacitors.

Diffusion capacitance

Under forward bias, minority carriers are injected across the junction and stored temporarily before recombining. This stored charge also varies with voltage, giving rise to diffusion capacitance:

Cdiff=τIFkT/qC_{diff} = \frac{\tau I_F}{kT/q}

where τ\tau is the minority carrier lifetime and IFI_F is the forward current.

Diffusion capacitance is proportional to the forward current, so it dominates at high forward bias. Under reverse bias, it's negligible because there's very little minority carrier injection.

Measuring capacitance-voltage characteristics

C-V measurements are a powerful experimental technique for extracting junction parameters. The procedure involves:

  1. Apply a DC bias voltage to set the operating point.
  2. Superimpose a small AC signal and measure the resulting capacitance.
  3. Sweep the DC bias and record CC vs. VV.

A Mott-Schottky plot graphs 1/CD21/C_D^2 vs. VaV_a. From the voltage-dependent capacitance equation, you can show that this plot should be a straight line for a uniformly doped junction. The slope gives you the doping concentration of the lightly doped side, and the x-intercept gives you VbiV_{bi}. This makes C-V analysis one of the most practical ways to characterize a p-n junction experimentally.

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