11.3 Insulated-gate bipolar transistors (IGBTs)

Structure of IGBTs

An IGBT (insulated-gate bipolar transistor) combines the voltage-controlled gate of a MOSFET with the high-current, low-saturation-voltage capability of a BJT. This hybrid design makes IGBTs the dominant device in high-voltage, high-current power electronics, including motor drives, inverters, and switch-mode power supplies.

The device has a four-layer P-N-P-N structure, similar to a thyristor, but with a MOSFET gate that controls conductivity. This gives you the easy gate drive of a MOSFET and the strong current handling of a bipolar device.

Vertical cross-section

The vertical cross-section reveals the four-layer stack with the MOSFET gate sitting on top:

• Emitter (N+): The topmost semiconductor contact, where electrons enter the device
• Body region (P): Sits beneath the emitter; the MOSFET channel forms here when gate voltage is applied
• Drift region (N-): A thick, lightly doped layer that supports high blocking voltages in the off-state
• Collector (P+): The bottom layer, which injects holes into the drift region during the on-state, enabling bipolar (conductivity-modulated) conduction

The MOSFET gate structure consists of a polysilicon gate electrode separated from the body region by a thin gate oxide. When sufficient voltage is applied, an inversion channel forms in the P-type body, connecting the N+ emitter to the N- drift region.

The lightly doped drift region is the key to high voltage blocking. Its thickness and doping concentration are engineered to spread the electric field and withstand the rated breakdown voltage.

Equivalent circuit representation

The equivalent circuit of an IGBT is a MOSFET driving a wide-base PNP BJT:

• The MOSFET gate terminal serves as the control input
• The MOSFET channel supplies electron current into the drift region, which acts as the base current for the PNP BJT
• The collector and emitter of the PNP BJT form the power output terminals
• The MOSFET drain connects to the base of the PNP BJT, creating a Darlington-like configuration

This model is useful for understanding both DC and transient behavior. The MOSFET sets the drive conditions, and the PNP BJT determines the output current gain and saturation characteristics.

Operating principle of IGBTs

The IGBT operates through the combined action of its MOSFET and PNP BJT sections. The MOSFET controls whether the device is on or off, while the PNP BJT provides the high-current conduction path with low on-state voltage.

Controlling conductivity via gate voltage

When a positive voltage is applied to the gate (above the threshold voltage, typically 5–7 V), the MOSFET creates an inversion channel in the P-type body region. Electrons flow from the emitter through this channel into the N- drift region.

These electrons serve as the base current for the PNP BJT, turning it on. The PNP BJT then injects holes from the P+ collector into the drift region. Both electrons and holes now carry current through the drift region, which is called conductivity modulation. This dramatically lowers the resistance of the thick drift region compared to a unipolar MOSFET.

Increasing the gate voltage increases channel conductivity, which raises both electron and hole currents. The gate can operate the IGBT in either linear mode (proportional control) or switched mode (fully on/off).

On-state characteristics

In the on-state, the IGBT conducts high current with a relatively low collector-emitter voltage drop. This voltage drop has three components:

• MOSFET channel voltage drop from the resistance of the inversion layer
• Drift region voltage drop, reduced significantly by conductivity modulation
• PNP BJT junction voltage (roughly 0.7–1 V from the P+ collector junction)

The total on-state voltage is typically higher than a power MOSFET (because of the BJT junction drop) but lower than a standalone BJT at high currents. On-state performance can be improved by optimizing device geometry, doping profiles, and carrier lifetime in the drift region.

Off-state characteristics

When the gate voltage is removed, the IGBT blocks high voltage across the collector-emitter terminals with minimal leakage current.

• The drift region thickness and doping determine the maximum blocking voltage
• A field-stop layer (N+) between the drift region and collector shapes the electric field distribution to achieve high breakdown voltage without excessive drift region thickness
• Leakage current comes mainly from thermal carrier generation in the drift region and surface leakage at junction terminations
• Off-state performance improves with optimized drift region design, field-stop layers, and proper junction termination techniques

Comparison of IGBTs vs MOSFETs

Both IGBTs and MOSFETs are voltage-controlled devices, but they excel in different operating regimes. The choice depends on voltage/current ratings, switching frequency, and efficiency requirements.

Voltage and current ratings

IGBTs handle higher voltages and currents than MOSFETs:

• IGBT voltage ratings: 600 V to 6.5 kV, enabled by the thick drift region and bipolar structure
• MOSFET voltage ratings: Typically below 1 kV (though SiC MOSFETs are pushing higher)
• Current density: IGBTs achieve higher current densities because conductivity modulation (bipolar conduction with both electrons and holes) lowers the drift region resistance. At high voltages, a MOSFET's drift region resistance rises steeply with voltage rating, making IGBTs more efficient above roughly 600 V.
• IGBT current ratings can reach several hundred amperes in a single module.

Switching speed and losses

MOSFETs switch faster because they are unipolar devices (majority carriers only):

• MOSFET switching times: Tens to hundreds of nanoseconds
• IGBT switching times: Typically a few microseconds

The IGBT's slower turn-off is caused by tail current: minority carriers (holes) stored in the drift region during the on-state must recombine before current fully stops. This stored charge increases switching losses, especially at higher frequencies.

As switching frequency rises, IGBT switching losses grow and eventually dominate total losses. This is why IGBTs are generally limited to frequencies below ~20–50 kHz in most applications.

Applications and trade-offs

• IGBTs dominate in medium to high-power applications: motor drives, grid-tied inverters, traction drives, induction heating, and UPS systems
• MOSFETs are preferred for low to medium-power, high-frequency applications: DC-DC converters, switched-mode power supplies, and RF amplifiers

The core trade-off: IGBTs give you better voltage/current capability with lower conduction losses at high voltages, while MOSFETs give you faster switching with lower switching losses. Your application's voltage level and switching frequency determine which device wins.

IGBT turn-on process

The turn-on process involves charging the device's internal capacitances and establishing the on-state current. It begins when a positive gate voltage is applied, creating the inversion channel.

Capacitances and charges

Three capacitances govern the switching transients:

• $C_{ge}$ (gate-emitter capacitance): Sum of the gate oxide capacitance and the gate-to-inversion-layer capacitance. This is the primary capacitance charged during the initial gate voltage rise.
• $C_{gc}$ (gate-collector capacitance): Also called the Miller capacitance. It varies with the depletion width in the drift region and dominates during the voltage transition (Miller plateau).
• $C_{ce}$ (collector-emitter capacitance): Includes the drift region depletion capacitance and the PNP BJT diffusion capacitance.

The gate driver circuit must supply enough current to charge these capacitances within the desired switching time. Larger capacitances or faster switching require higher gate drive current.

Stages of turn-on transient

The turn-on transient has four stages:

1. Gate charging: $C_{ge}$ charges from 0 V up to the threshold voltage $V_{th}$. No collector current flows yet. The time constant is set by $R_g C_{ge}$.
2. Current rise: Once $V_{gs} > V_{th}$, the MOSFET channel conducts and collector current rises rapidly. The PNP BJT begins conducting as electron current reaches the drift region.
3. Miller plateau: The gate voltage holds nearly constant at the Miller voltage $V_m$ while $C_{gc}$ charges. During this stage, the collector-emitter voltage falls as the device transitions into the on-state.
4. Voltage fall completion: The collector voltage drops to its final on-state value, and collector current reaches steady state. The gate voltage then continues rising toward the applied gate drive voltage.

Each stage contributes to the total turn-on energy loss. Proper gate driver design (choosing $R_g$, drive voltage, and driver output impedance) directly controls these losses.

Modeling turn-on delay and rise time

The turn-on delay $t_{d(on)}$ is the time from gate voltage application to the start of collector current rise:

$t_{d(on)} = R_g C_{ge} \ln\left(\frac{V_{gg}}{V_{gg} - V_{th}}\right)$

where $V_{gg}$ is the applied gate voltage.

The current rise time $t_r$ (time for collector current to reach ~90% of its final value) can be approximated as:

$t_r \approx 2.2 \, R_g C_{gc}$

Both expressions show that reducing gate resistance $R_g$ speeds up turn-on but increases peak gate current and may cause oscillations. There's a practical trade-off between switching speed and electromagnetic interference (EMI).

IGBT turn-off process

Turn-off involves discharging the gate capacitances and removing the excess carriers (electrons and holes) stored in the drift region. It begins when the gate voltage is driven low or negative.

Capacitances and charges

The same three capacitances ($C_{ge}$, $C_{gc}$, $C_{ce}$) govern the turn-off transient, but now they discharge through the gate driver. The critical additional factor during turn-off is the stored charge in the drift region. During the on-state, conductivity modulation fills the drift region with excess carriers. These must recombine or be swept out before the device fully blocks voltage, which causes the characteristic tail current.

Stages of turn-off transient

The turn-off transient has four stages:

1. Gate discharging: $C_{ge}$ discharges until the gate voltage drops to the Miller voltage $V_m$. The collector current remains approximately constant during this stage.
2. Miller plateau (voltage rise): The gate voltage holds near $V_m$ while $C_{gc}$ discharges. The collector-emitter voltage rises rapidly as the MOSFET channel starts to pinch off.
3. Current fall: Once the gate voltage drops below $V_{th}$, the MOSFET channel closes. Collector current drops rapidly as the electron current path is cut off.
4. Tail current: The remaining excess holes in the drift region recombine slowly, producing a decaying tail current. This stage is unique to IGBTs (MOSFETs don't have it) and is the main source of turn-off energy loss.

Modeling turn-off delay and fall time

The turn-off delay $t_{d(off)}$ is the time from the negative gate voltage application to the start of the collector voltage rise:

$t_{d(off)} = R_g C_{ge} \ln\left(\frac{V_{gg} + V_{gn}}{V_m + V_{gn}}\right)$

where $V_{gn}$ is the magnitude of the negative gate drive voltage.

The voltage rise time $t_v$ is approximated as:

$t_v \approx 2.2 \, R_g C_{gc}$

The current fall time $t_f$ depends on how fast excess carriers recombine in the drift region:

$t_f = \frac{W_d^2}{2 D_n}$

where $W_d$ is the drift region width and $D_n$ is the electron diffusion coefficient. Shorter carrier lifetimes speed up $t_f$ but increase on-state voltage drop, so there's a direct trade-off between conduction loss and switching loss. Device designers tune carrier lifetime (using techniques like electron irradiation or proton implantation) to balance these competing requirements.

Safe operating area of IGBTs

The safe operating area (SOA) defines the voltage and current boundaries within which the IGBT can operate without damage. Operating outside the SOA risks thermal runaway, latch-up, or avalanche breakdown.

Forward-bias SOA

The forward-bias SOA (FBSOA) specifies the maximum collector current vs. collector-emitter voltage the device can handle while it's on and the gate is forward-biased.

• The primary limit is junction temperature: power dissipation ($V_{CE} \times I_C$) heats the die, and exceeding the maximum junction temperature (typically 150–175°C) causes failure
• At low $V_{CE}$, the current limit is set by the maximum rated current
• At high $V_{CE}$, the current must be reduced to keep power dissipation within thermal limits
• FBSOA can be extended with larger die sizes, better thermal management (heatsinks, thermal interface materials), or paralleling multiple devices
• Datasheets show FBSOA as a log-log plot of $I_C$ vs. $V_{CE}$ with boundaries for DC and pulsed operation

Reverse-bias SOA

The reverse-bias SOA (RBSOA) defines the maximum $V_{CE}$ the device can block when the gate is off (reverse-biased or zero volts).

• The limit is avalanche breakdown of the drift region
• Breakdown voltage depends on drift region thickness and doping
• The RBSOA is especially important during inductive turn-off, when voltage spikes can exceed the DC bus voltage
• Techniques to extend RBSOA include optimized field-stop layers, junction termination extensions, and guard rings
• Datasheets specify this as a maximum $V_{CE}$ rating (e.g., 1200 V, 1700 V)

Switching SOA

The switching SOA (SSOA) covers the simultaneous high-voltage, high-current conditions that occur during switching transients.

• The main risk is dynamic avalanche: during turn-off, the device can experience high $V_{CE}$ and high $I_C$ at the same time, causing localized avalanche breakdown in the drift region
• Dynamic avalanche is more severe at higher junction temperatures and faster switching speeds
• Mitigation strategies include soft-switching techniques (zero-voltage switching, zero-current switching), snubber circuits to limit $dV/dt$, and appropriate gate resistance selection
• Datasheets show SSOA as $I_C$ vs. $V_{CE}$ curves at different gate resistances and temperatures

IGBT gate drive requirements

Proper gate drive design is critical for reliable IGBT operation. The gate driver must deliver the right voltage and current levels, provide isolation between control and power stages, and protect against fault conditions.

Gate voltage and current

• Turn-on voltage: Typically +15 V (range: 10–20 V). Must exceed $V_{th}$ by a comfortable margin to ensure full enhancement, but must stay below the maximum $V_{GE}$ rating (usually ±20 V) to avoid gate oxide breakdown.
• Turn-off voltage: Typically -5 to -15 V. A negative voltage speeds up turn-off and prevents parasitic turn-on from $dV/dt$-induced Miller current coupling through $C_{gc}$.
• Peak gate current: Can reach several amperes for fast switching. The required current is determined by $I_g = C_{iss} \cdot dV_g/dt$, where $C_{iss}$ is the input capacitance. Low-impedance gate drivers are essential for fast switching.
• Gate resistance ($R_g$): Controls the switching speed. Lower $R_g$ gives faster switching (lower losses) but increases EMI and $dV/dt$ stress. Higher $R_g$ gives softer switching but increases switching losses.

Gate driver circuit topologies

Several topologies exist, chosen based on isolation requirements and power level:

• Direct-coupled driver: A bipolar voltage source drives the gate directly through $R_g$. Simple and low-cost, but provides no isolation. Used only in low-side switches with a common ground.
• Transformer-isolated driver: A pulse transformer transmits the gate signal across an isolation barrier. Provides galvanic isolation and can handle high $dV/dt$ across the isolation boundary. Requires careful transformer design to avoid pulse distortion.
• Optocoupler-isolated driver: Uses an LED and photodetector for signal isolation, with a separate isolated power supply for the gate drive voltage. Common in industrial drives and inverters.
• Both isolated topologies need an isolated power supply (DC-DC converter or bootstrap circuit) to generate the gate drive voltage on the high-side.

Protection and isolation

The gate driver must protect the IGBT against fault conditions:

• Gate overvoltage protection: A Zener diode or TVS (transient voltage suppressor) clamps $V_{GE}$ to prevent gate oxide damage. Typically clamped at ±18–20 V.
• Overcurrent / desaturation detection: Monitors $V_{CE}$ during the on-state. If $V_{CE}$ rises above a threshold (indicating the device is leaving saturation due to overcurrent), the driver initiates a controlled turn-off. This is the most common IGBT protection method.
• Short-circuit protection: Must detect a short circuit and turn off the IGBT within a few microseconds (typically <10 µs). IGBTs can withstand short-circuit current for a limited time (specified in the datasheet, usually 5–10 µs), so fast detection is essential.
• $dV/dt$ immunity: The driver must reject common-mode transients (high $dV/dt$ on the power stage) to avoid false triggering. This is especially important for high-side drivers in half-bridge configurations.