6.3 Carrier concentration and mobility

Carrier concentration and mobility govern how semiconductors conduct electricity. Carrier concentration tells you how many charge carriers (electrons or holes) are available per unit volume, while mobility describes how easily those carriers move through the crystal lattice. Together, they determine a material's conductivity and ultimately the performance of every semiconductor device.

Carrier concentration

Carrier concentration is the number of free charge carriers (electrons or holes) per unit volume, typically expressed in $cm^{-3}$. It's the single most important quantity you can control through doping, and it varies enormously between metals, intrinsic semiconductors, and doped semiconductors.

Intrinsic vs extrinsic semiconductors

In an intrinsic (undoped) semiconductor, every free electron in the conduction band leaves behind a hole in the valence band. So the electron concentration $n$ equals the hole concentration $p$, and both equal the intrinsic carrier concentration $n_i$. For silicon at room temperature, $n_i \approx 1.5 \times 10^{10} \, cm^{-3}$.

Extrinsic semiconductors are intentionally doped with impurities:

• n-type: Donor atoms (e.g., phosphorus in silicon) contribute extra electrons. The electron concentration $n$ far exceeds $n_i$.
• p-type: Acceptor atoms (e.g., boron in silicon) create extra holes. The hole concentration $p$ far exceeds $n_i$.

Typical doping levels range from $10^{14}$ to $10^{20} \, cm^{-3}$, which can be many orders of magnitude above $n_i$. A key relationship that always holds in thermal equilibrium is the mass action law: $np = n_i^2$. So if you increase one carrier type through doping, the other type decreases.

Fermi level and carrier concentration

The Fermi level $E_F$ is the energy at which the probability of electron occupation is exactly 0.5 (from the Fermi-Dirac distribution).

• In an intrinsic semiconductor, $E_F$ sits near the middle of the bandgap.
• n-type doping shifts $E_F$ upward, closer to the conduction band edge $E_C$.
• p-type doping shifts $E_F$ downward, closer to the valence band edge $E_V$.

The carrier concentrations depend exponentially on the position of $E_F$ relative to the band edges:

$n = N_C \exp\left(\frac{-(E_C - E_F)}{k_B T}\right)$

$p = N_V \exp\left(\frac{-(E_F - E_V)}{k_B T}\right)$

Here $N_C$ and $N_V$ are the effective densities of states in the conduction and valence bands. The exponential dependence means even a small shift in $E_F$ from doping produces a large change in carrier concentration.

Temperature dependence of carrier concentration

The intrinsic carrier concentration $n_i$ increases with temperature following:

$n_i \propto T^{3/2} \exp\left(\frac{-E_g}{2k_B T}\right)$

where $E_g$ is the bandgap energy, $k_B$ is Boltzmann's constant, and $T$ is absolute temperature. The exponential term dominates, so $n_i$ rises sharply as temperature increases.

For extrinsic semiconductors, there are three temperature regimes to know:

1. Freeze-out (low T): Not all dopant atoms are ionized. Carrier concentration is below the doping level.
2. Extrinsic/saturation (moderate T): Essentially all dopants are ionized. Carrier concentration is roughly constant and equal to the doping concentration.
3. Intrinsic (high T): Thermal generation across the bandgap overwhelms the doping contribution. The material behaves as if it were undoped.

Most devices operate in the saturation regime, where carrier concentration is stable and predictable.

Carrier concentration in metals vs semiconductors

• Metals: Carrier concentrations of $10^{22}$–$10^{23} \, cm^{-3}$, fixed by the electronic band structure. You can't tune this with doping.
• Semiconductors: Carrier concentrations of $10^{10}$–$10^{18} \, cm^{-3}$ (or higher with heavy doping), tunable over many orders of magnitude.

This tunability is exactly what makes semiconductors useful for devices.

Carrier mobility

Carrier mobility $\mu$ quantifies how quickly carriers respond to an applied electric field. High mobility means carriers accelerate more easily, which translates directly to higher conductivity and faster device operation.

Definition and units of mobility

Mobility is defined as the ratio of drift velocity to applied electric field:

$\mu = \frac{v_d}{E}$

Units are $cm^2/(V \cdot s)$ in CGS (most common in semiconductor physics) or $m^2/(V \cdot s)$ in SI.

For reference, electron mobility in silicon at room temperature is about $1350 \, cm^2/(V \cdot s)$, while hole mobility in silicon is about $480 \, cm^2/(V \cdot s)$. In GaAs, electron mobility reaches roughly $8500 \, cm^2/(V \cdot s)$.

Factors affecting carrier mobility

Four main factors control mobility:

• Lattice scattering (phonon scattering): Carriers collide with thermally vibrating lattice atoms. More vibrations at higher temperatures means more scattering and lower mobility.
• Impurity scattering: Ionized dopants and charged defects deflect carriers through Coulomb interactions. Heavier doping means more scattering.
• Carrier effective mass: The effective mass $m^*$ reflects how the band structure affects carrier motion. Lighter effective mass gives higher mobility (this is why GaAs electrons are so fast compared to Si).
• Alloy scattering: In compound semiconductors and alloys, random variations in composition can scatter carriers.

Lattice scattering vs impurity scattering

These two mechanisms dominate in different temperature ranges:

• High temperatures: Lattice scattering dominates because phonon populations grow with $T$. Mobility decreases.
• Low temperatures: Phonons freeze out, so impurity scattering dominates. Mobility actually increases with temperature in this regime because faster-moving carriers are harder for charged impurities to deflect.

The crossover temperature depends on the doping level. Heavily doped samples have impurity scattering dominating over a wider temperature range.

Temperature dependence of mobility

Each scattering mechanism has a characteristic temperature dependence:

• Lattice scattering: $\mu_L \propto T^{-3/2}$
• Ionized impurity scattering: $\mu_I \propto T^{3/2}$

The total mobility combines these via Matthiessen's rule:

$\frac{1}{\mu} = \frac{1}{\mu_L} + \frac{1}{\mu_I}$

The mechanism with the lower mobility dominates the total. By plotting $\mu$ vs. $T$ on a log-log scale, you can identify which scattering mechanism controls transport at a given temperature.

Mobility in metals vs semiconductors

• Metals: Mobilities of roughly $1$–$100 \, cm^2/(V \cdot s)$. The very high carrier concentration means strong electron-electron and electron-phonon interactions limit mobility.
• Semiconductors: Mobilities from $\sim 100$ to over $10^5 \, cm^2/(V \cdot s)$. High-mobility materials like GaAs, InSb, and InGaAs are chosen for high-frequency transistors (HEMTs) and fast switching applications.

Metals still conduct well overall because their enormous carrier concentration more than compensates for low mobility.

Carrier transport

Carrier transport describes how charge carriers move in response to applied fields. The two main transport mechanisms are drift (driven by electric fields) and diffusion (driven by concentration gradients), though this section focuses on drift and field-related effects.

Drift current and drift velocity

When an electric field $E$ is applied, carriers acquire an average drift velocity:

$v_d = \mu E$

The resulting drift current density for electrons is:

$J_n = nq\mu_n E$

For a semiconductor with both electrons and holes, the total drift current density is:

$J = (n\mu_n + p\mu_p)qE$

where $n$ and $p$ are electron and hole concentrations, and $\mu_n$ and $\mu_p$ are their respective mobilities.

Conductivity and resistivity

Conductivity $\sigma$ ties together carrier concentration and mobility:

$\sigma = q(n\mu_n + p\mu_p)$

Resistivity is simply the inverse:

$\rho = \frac{1}{\sigma}$

This equation shows why semiconductors are so versatile: you can tune $\sigma$ over many orders of magnitude by changing $n$ (through doping) or $\mu$ (through material choice). In metals, $n$ is fixed, so conductivity changes come mainly from mobility variations (e.g., with temperature).

Hall effect and Hall coefficient

The Hall effect is one of the most powerful tools for characterizing semiconductors. When a magnetic field $B_z$ is applied perpendicular to a current $J_x$, carriers deflect sideways, building up a transverse electric field $E_y$ (the Hall voltage).

The Hall coefficient is:

$R_H = \frac{E_y}{J_x B_z} = \frac{1}{nq}$

(For p-type material, $R_H = +1/(pq)$.)

From a single Hall measurement combined with a resistivity measurement, you can extract:

1. Carrier type: The sign of $R_H$ tells you whether electrons (negative) or holes (positive) dominate.
2. Carrier concentration: $n = 1/(R_H q)$.
3. Hall mobility: $\mu_H = |R_H| \sigma = |R_H|/\rho$.

Magnetoresistance and its applications

Magnetoresistance is the change in a material's electrical resistance when a magnetic field is applied. There are several types:

• Ordinary magnetoresistance: Arises from the Lorentz force curving carrier paths, increasing the effective path length and resistance. The effect is typically small in single-carrier systems.
• Giant magnetoresistance (GMR): Occurs in multilayer structures of alternating ferromagnetic and non-magnetic layers. Resistance depends strongly on the relative magnetization of adjacent layers. GMR is the technology behind modern hard drive read heads and magnetic sensors.
• Colossal magnetoresistance (CMR): Observed in certain manganese oxide perovskites (e.g., $La_{1-x}Sr_xMnO_3$), where resistance can change by orders of magnitude in a magnetic field. Still largely a research topic for magnetic memory applications.

Measurement techniques

Accurate measurement of carrier concentration, mobility, and resistivity is essential for material characterization and device optimization. Here are the standard techniques.

Hall effect measurements

Hall measurements are the go-to method for determining carrier type, concentration, and mobility simultaneously.

1. Pass a known current $I$ through the sample.
2. Apply a perpendicular magnetic field $B$.
3. Measure the transverse Hall voltage $V_H$.
4. Calculate $R_H = V_H t / (IB)$, where $t$ is the sample thickness.
5. Extract carrier concentration from $n = 1/(R_H q)$ and Hall mobility from $\mu_H = |R_H| \sigma$.

The van der Pauw configuration is commonly used for thin films and irregularly shaped samples, where four contacts are placed around the sample perimeter.

Four-point probe method

The four-point probe measures resistivity while eliminating contact resistance artifacts.

1. Four equally spaced, collinear probes contact the sample surface.
2. Current flows through the two outer probes.
3. Voltage is measured across the two inner probes.
4. Resistivity is calculated as $\rho = \frac{V}{I} \times C$, where $C$ is a geometric correction factor that depends on probe spacing and sample thickness.

Because the voltage probes draw negligible current, contact resistance at those probes doesn't affect the measurement. This technique works for both bulk samples and thin films.

Van der Pauw method

The van der Pauw method extends the four-point probe concept to samples of arbitrary shape, as long as the sample is flat, uniformly thick, and has no holes.

• Four contacts are placed on the perimeter of the sample.
• Resistance measurements are taken in multiple configurations (e.g., $R_{12,34}$ and $R_{23,41}$).
• The sheet resistance $R_s$ is found by solving the van der Pauw equation: $\exp(-\pi R_{12,34}/R_s) + \exp(-\pi R_{23,41}/R_s) = 1$.
• Combining with Hall measurements in the same geometry gives both resistivity and Hall coefficient.

This method is a standard in the semiconductor industry because it doesn't require precisely shaped samples.

Capacitance-voltage (C-V) measurements

C-V measurements probe the carrier concentration profile as a function of depth, which Hall measurements cannot do.

• A voltage is swept across a MOS capacitor or reverse-biased p-n junction.
• The depletion width changes with voltage, and the measured capacitance reflects the charge at the depletion edge.
• Plotting $1/C^2$ vs. $V$ (Mott-Schottky plot) yields a straight line whose slope gives the carrier concentration: $N = \frac{-2}{q\epsilon_s \, d(1/C^2)/dV}$.

C-V measurements also reveal oxide thickness, interface trap density, and flat-band voltage in MOS structures, making them indispensable for process characterization.

Applications

High-mobility semiconductors for electronics

High electron mobility translates directly to faster switching and higher operating frequencies. Materials like GaAs ($\mu_n \approx 8500 \, cm^2/(V \cdot s)$), InGaAs, and InSb outperform silicon for high-frequency applications.

• HEMTs (High Electron Mobility Transistors) use a 2D electron gas at a heterostructure interface to achieve extremely high mobilities.
• Applications include 5G wireless communication, radar systems, satellite receivers, and low-noise amplifiers.

The trade-off is cost and integration complexity: silicon is far cheaper and has a mature fabrication ecosystem, so III-V semiconductors are reserved for applications where speed or frequency truly matters.

Thermoelectric materials and figure of merit

Thermoelectric devices convert heat directly to electricity (Seebeck effect) or pump heat using electricity (Peltier effect). Their efficiency is captured by the dimensionless figure of merit:

$ZT = \frac{S^2 \sigma}{\kappa} T$

where $S$ is the Seebeck coefficient, $\sigma$ is electrical conductivity, $\kappa$ is thermal conductivity, and $T$ is absolute temperature.

Maximizing $ZT$ requires high $\sigma$ (high carrier concentration and mobility), high $S$ (which actually favors lower carrier concentration), and low $\kappa$. These competing requirements mean the optimal carrier concentration is typically around $10^{19}$–$10^{20} \, cm^{-3}$. Strategies for improving $ZT$ include band engineering to enhance $S$, nanostructuring to scatter phonons and reduce $\kappa$ (as in $Bi_2Te_3$ and PbTe systems), and optimizing doping levels.

Transparent conducting oxides (TCOs)

TCOs combine electrical conductivity with optical transparency in the visible spectrum. They're essential as electrodes in solar cells, flat-panel displays, touchscreens, and LEDs.

Common TCOs include:

• ITO (indium tin oxide): The industry standard, with carrier concentrations around $10^{21} \, cm^{-3}$ and mobilities of $20$–$40 \, cm^2/(V \cdot s)$.
• FTO (fluorine-doped tin oxide): Lower cost, good chemical stability.
• AZO (aluminum-doped zinc oxide): Indium-free alternative, tunable properties.

There's an inherent trade-off: increasing carrier concentration improves conductivity but also increases free-carrier absorption in the near-infrared, reducing transparency. Optimizing deposition conditions and doping levels is key to balancing these competing demands.

Semiconductor devices and carrier control

Nearly every semiconductor device relies on controlling carrier concentration and transport:

• P-n junctions: The foundation of diodes and solar cells. Bringing p-type and n-type regions together creates a built-in electric field in the depletion region that controls carrier flow.
• BJTs (Bipolar Junction Transistors): Use injection of minority carriers across a forward-biased junction to control current. Performance depends on carrier lifetime and diffusion length.
• MOSFETs (Metal-Oxide-Semiconductor FETs): An applied gate voltage modulates the carrier concentration in a channel, switching the device on and off. Channel mobility directly affects switching speed.
• Solar cells: Photons generate electron-hole pairs. The built-in field of a p-n junction separates them before they recombine. Carrier diffusion length (how far a carrier travels before recombining) must exceed the absorption depth for efficient collection.

In all these devices, the interplay between carrier concentration, mobility, and lifetime determines performance.