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🧗‍♀️Semiconductor Physics

Key Semiconductor Defects

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Why This Matters

In semiconductor physics, perfection is actually the exception—and understanding why is essential for the AP exam. Defects aren't just flaws; they're the foundation of how we engineer semiconductor devices. Every time you encounter a question about doping, carrier mobility, device reliability, or material strength, you're really being asked about defects and their consequences. The physics of defects explains everything from why silicon can conduct electricity to why transistors eventually fail.

You're being tested on your ability to connect defect types to their physical mechanisms and device-level impacts. Can a vacancy enhance diffusion? How does a dislocation affect mechanical properties? Why do deep-level traps kill device performance while shallow dopants improve it? Don't just memorize names—know what category each defect belongs to, what physical principle it demonstrates, and how it changes material behavior.


Point Defects: The Zero-Dimensional Disruptors

Point defects are localized atomic-scale disruptions—single atoms missing, misplaced, or swapped. Despite their tiny size, they dominate diffusion rates, carrier concentrations, and doping behavior. These are the defects you'll encounter most in semiconductor device questions.

Vacancies

  • Missing lattice atoms—the simplest point defect, created when an atom leaves its regular site
  • Accelerate diffusion by providing empty sites for neighboring atoms to jump into, following DeEa/kTD \propto e^{-E_a/kT}
  • Affect carrier lifetime and mechanical properties; concentration increases exponentially with temperature

Interstitials

  • Extra atoms squeezed between lattice sites—creates local strain fields in the crystal
  • Smaller atoms preferred (hydrogen, carbon, oxygen) because they fit more easily into interstitial spaces
  • Alter conductivity by introducing scattering centers or acting as unintentional dopants

Substitutional Impurities

  • Foreign atoms replacing host atoms—the basis of intentional semiconductor doping
  • Modify band structure by adding donor or acceptor energy levels within the bandgap
  • Size matching matters—atoms with similar radii to the host substitute more readily (Hume-Rothery rules)

Compare: Interstitials vs. Substitutional impurities—both introduce foreign atoms, but interstitials squeeze between lattice sites while substitutionals replace host atoms. FRQ tip: if asked about doping mechanisms, substitutional impurities are your go-to example.

Frenkel Defects

  • Vacancy-interstitial pair—an atom leaves its site and moves to a nearby interstitial position
  • Common in ionic crystals with large size differences between cations and anions (like AgCl)
  • Preserve stoichiometry while increasing ionic conductivity through the vacancy mechanism

Schottky Defects

  • Paired cation-anion vacancies—maintains charge neutrality in ionic compounds
  • Reduces material density because atoms are removed entirely from the crystal
  • Temperature-dependent concentration following nseEs/2kTn_s \propto e^{-E_s/2kT} where EsE_s is formation energy

Compare: Frenkel vs. Schottky defects—both occur in ionic crystals, but Frenkel moves an atom to an interstitial (constant density) while Schottky removes atom pairs entirely (reduced density). Exam favorite: identifying which defect type dominates based on ion size ratios.


Line Defects: One-Dimensional Disruptions

Dislocations are linear defects where atomic planes are displaced relative to each other. They're the key to understanding plastic deformation—without dislocations, materials would be either perfectly brittle or impossibly strong.

Edge Dislocations

  • Extra half-plane of atoms—imagine inserting a partial sheet of paper into a stack
  • Burgers vector perpendicular to the dislocation line, defining the magnitude and direction of lattice distortion
  • Enable slip at stresses far below theoretical strength; movement explains why metals are ductile

Screw Dislocations

  • Helical atomic arrangement—atoms spiral around the dislocation line like a parking garage ramp
  • Burgers vector parallel to the dislocation line, allowing easier cross-slip between planes
  • Critical for crystal growth—provide self-perpetuating steps where new atoms can attach

Compare: Edge vs. Screw dislocations—both enable plastic deformation, but edge dislocations have perpendicular Burgers vectors while screw dislocations have parallel ones. Screw dislocations move more freely because they can cross-slip onto different planes.


Planar Defects: Two-Dimensional Boundaries

Planar defects are interfaces where the regular crystal structure changes abruptly. They control grain structure, affect carrier scattering, and determine how materials respond to stress.

Grain Boundaries

  • Interfaces between misoriented crystal regions—polycrystalline materials contain many grains at different angles
  • Impede dislocation motion through the Hall-Petch relationship: σy=σ0+k/d\sigma_y = \sigma_0 + k/\sqrt{d} where smaller grains mean higher strength
  • Scatter charge carriers and provide fast diffusion paths, affecting both electrical and chemical behavior

Stacking Faults

  • Errors in layer stacking sequence—in FCC metals, the normal ABCABC pattern might become ABCBCABC
  • Lower energy than grain boundaries but still affect slip behavior and mechanical properties
  • Bounded by partial dislocations—the fault exists between two Shockley partials

Twin Boundaries

  • Mirror-symmetric crystal regions—atoms on opposite sides are crystallographic reflections
  • Enhance ductility and toughness by providing additional deformation mechanisms
  • Form during deformation or annealing—mechanical twins vs. annealing twins have different origins

Compare: Grain boundaries vs. Twin boundaries—both separate crystal regions, but grain boundaries are disordered high-energy interfaces while twin boundaries are ordered, low-energy mirror planes. Twin boundaries generally have less impact on electrical properties.


Bulk Defects: Three-Dimensional Imperfections

Volume defects are macroscopic features that affect overall material integrity. These become critical in device reliability and failure analysis.

Voids

  • Empty cavities within the material—can range from atomic clusters to visible pores
  • Act as stress concentrators—crack initiation often begins at voids, following σlocal=σapplied×Kt\sigma_{local} = \sigma_{applied} \times K_t
  • Form during processing (trapped gas, vacancy coalescence) or operation (electromigration in interconnects)

Precipitates

  • Clusters of secondary phase atoms—form when solubility limits are exceeded
  • Enable precipitation hardening—coherent precipitates block dislocation motion, dramatically increasing strength
  • Affect electrical properties by scattering carriers or introducing interface states

Compare: Voids vs. Precipitates—both are bulk defects, but voids weaken materials by concentrating stress while precipitates can strengthen materials through dislocation pinning. Know which processing conditions favor each.


Electronic Defects: Carrier Traps and Dopants

These defects directly control electrical behavior by introducing energy states within the bandgap. This is where defect physics meets device physics.

Deep-Level Traps

  • Energy levels far from band edges—typically more than a few kTkT from conduction or valence band
  • Capture and hold carriers—act as recombination centers that reduce carrier lifetime via τ1/Nt\tau \propto 1/N_t
  • Device killers—degrade LED efficiency, solar cell performance, and transistor reliability

Shallow-Level Dopants

  • Energy levels close to band edges—ionize easily at room temperature (within ~kTkT of bands)
  • Control carrier concentration—donors (P, As in Si) provide electrons; acceptors (B, Ga) provide holes
  • Foundation of all semiconductor devices—without shallow dopants, no p-n junctions, no transistors

Dangling Bonds

  • Unpaired electrons at surfaces or interfaces—occur where crystal periodicity terminates
  • Create midgap states that trap carriers and pin the Fermi level
  • Passivated by hydrogenSiHSi-H bonds eliminate most dangling bond states in amorphous silicon

Surface States

  • Electronic states localized at material surfaces—arise from broken translational symmetry
  • Cause Fermi level pinning—can dominate metal-semiconductor contact behavior
  • Density depends on surface preparation—clean vs. oxidized vs. contaminated surfaces behave very differently

Compare: Deep-level traps vs. Shallow-level dopants—both introduce bandgap states, but shallow dopants ionize completely and enhance conductivity while deep-level traps capture carriers and reduce device performance. This distinction is fundamental to semiconductor engineering.


Quick Reference Table

ConceptBest Examples
Zero-dimensional (point) defectsVacancies, Interstitials, Substitutional impurities
Ionic crystal defectsFrenkel defects, Schottky defects
One-dimensional (line) defectsEdge dislocations, Screw dislocations
Two-dimensional (planar) defectsGrain boundaries, Stacking faults, Twin boundaries
Three-dimensional (bulk) defectsVoids, Precipitates
Carrier traps (harmful)Deep-level traps, Dangling bonds
Intentional doping (beneficial)Shallow-level dopants, Substitutional impurities
Surface/interface effectsSurface states, Dangling bonds, Grain boundaries

Self-Check Questions

  1. Both Frenkel and Schottky defects occur in ionic crystals—what physical difference determines which type dominates, and how does each affect material density?

  2. Compare edge and screw dislocations: how do their Burgers vectors differ relative to the dislocation line, and why does this make screw dislocations more mobile?

  3. If an FRQ asks you to explain why polycrystalline silicon has lower carrier mobility than single-crystal silicon, which defect types would you discuss and why?

  4. A semiconductor device shows reduced efficiency due to carrier recombination. Would you suspect deep-level traps or shallow-level dopants? Explain the energy-level reasoning.

  5. Contrast how voids and precipitates affect mechanical properties—under what conditions might each form during semiconductor processing?