📡Electromagnetic Interference Unit 7 – PCB Design for EMC

Key Concepts and Principles

• Electromagnetic Interference (EMI) occurs when unwanted electromagnetic energy disrupts the operation of electronic devices or systems
• Electromagnetic Compatibility (EMC) ensures that electronic devices can operate properly in their intended electromagnetic environment without causing interference to other devices
• Conducted EMI propagates through physical connections such as power lines, signal traces, or ground planes
  • Differential-mode EMI currents flow in opposite directions on signal lines
  • Common-mode EMI currents flow in the same direction on signal lines and return through ground
• Radiated EMI propagates through space as electromagnetic waves
  • Near-field EMI dominates close to the source (distance < λ/2π)
  • Far-field EMI dominates at greater distances (distance > λ/2π)
• EMI sources can be internal (on-board) or external (nearby devices or environmental factors)
• EMI coupling mechanisms include conduction, radiation, induction, and capacitive coupling
• EMC standards (FCC Part 15, CISPR, MIL-STD-461) define limits for EMI emissions and susceptibility to ensure compatibility between devices

PCB Layout Fundamentals

• PCB layout significantly impacts EMC performance by influencing EMI generation, propagation, and coupling
• Minimize loop areas in signal and power traces to reduce magnetic field coupling
  • Keep signal traces short and direct
  • Place decoupling capacitors close to ICs
• Avoid splitting ground or power planes, as slots or gaps can cause EMI issues
• Use ground planes to provide low-impedance return paths and shield against EMI
  • Dedicate one complete layer for ground in multi-layer PCBs
  • Connect ground planes on different layers using multiple vias
• Maintain controlled impedance for high-speed signals to minimize reflections and EMI
• Separate analog and digital circuits to prevent crosstalk and noise coupling
• Provide adequate clearance between traces and components to prevent unintended coupling
• Consider the effects of trace geometry, spacing, and thickness on signal integrity and EMI

Component Placement Strategies

• Place components strategically to minimize EMI generation and susceptibility
• Locate noise-sensitive components (analog circuits, clocks) away from noisy components (digital circuits, power supplies)
• Group functionally related components together to minimize trace lengths and loop areas
  • Place decoupling capacitors close to the power pins of ICs
  • Locate connectors and I/O ports near the associated circuitry
• Orient components to minimize coupling between sensitive traces and potential EMI sources
• Provide adequate spacing between components to allow for proper shielding and isolation
• Consider the effects of component height and orientation on EMI shielding effectiveness
• Place components on both sides of the PCB to optimize space and minimize trace lengths
• Use component placement to create natural shielding barriers between sensitive and noisy circuits

Grounding and Power Distribution

• Implement a well-designed grounding and power distribution system to minimize EMI
• Use a single-point ground (star ground) topology for low-frequency circuits
  • Connect all ground returns to a common point to avoid ground loops
  • Use separate ground planes for analog and digital circuits, connected at a single point
• Use a multi-point ground (mesh ground) topology for high-frequency circuits
  • Connect ground planes on different layers using multiple vias to minimize impedance
  • Provide a low-impedance return path for high-frequency currents
• Distribute power using separate analog and digital power planes or traces
  • Use power planes in multi-layer PCBs to minimize impedance and provide shielding
  • Route power traces on dedicated layers, avoiding loops and minimizing length
• Decouple power supplies using appropriate capacitors to reduce noise and EMI
  • Place decoupling capacitors close to the power pins of ICs
  • Use a combination of bulk, ceramic, and tantalum capacitors to cover different frequency ranges
• Implement proper grounding techniques for shielded cables and enclosures
  • Connect cable shields to ground at one end to prevent ground loops
  • Ensure good electrical contact between enclosure parts and ground

Signal Routing Techniques

• Route signals carefully to minimize EMI generation and susceptibility
• Keep signal traces as short and direct as possible to minimize loop areas and radiation
• Avoid routing sensitive signals parallel to noisy signals or power traces
  • Maintain adequate spacing between sensitive and noisy traces
  • Use guard traces or ground planes to provide shielding between traces
• Route high-speed signals on controlled-impedance traces to minimize reflections and EMI
  • Match trace impedance to the source and load impedances
  • Use appropriate trace width and spacing based on the desired impedance and board stackup
• Terminate high-speed signals properly to prevent ringing and reflections
  • Use series termination resistors near the source for point-to-point connections
  • Use parallel termination resistors near the load for multi-drop connections
• Avoid routing signals under or over split planes, as this can cause EMI and signal integrity issues
• Use differential signaling for high-speed or noise-sensitive signals to reduce EMI
  • Route differential pairs closely together to maintain signal balance and minimize loop area
  • Ensure equal length and symmetry for differential traces
• Minimize vias in signal traces, especially for high-speed signals, to reduce discontinuities and EMI

Shielding and Isolation Methods

• Implement shielding and isolation techniques to reduce EMI coupling and improve EMC
• Use shielded enclosures to contain EMI generated by the PCB and components
  • Ensure good electrical contact between enclosure parts and ground
  • Provide sufficient shielding coverage, especially for openings and seams
• Use shielded cables and connectors for external connections to prevent EMI coupling
  • Choose cables with appropriate shielding effectiveness for the frequency range of concern
  • Terminate cable shields properly to maintain shielding integrity
• Implement ground planes on PCB layers to provide shielding and low-impedance return paths
  • Use a complete ground plane layer in multi-layer PCBs
  • Minimize gaps or slots in ground planes, as they can compromise shielding effectiveness
• Use isolation techniques to prevent noise coupling between circuits
  • Separate sensitive analog and noisy digital circuits into different PCB regions
  • Use isolation transformers, optocouplers, or digital isolators for signal isolation
• Implement filters to suppress EMI at the source or receiver
  • Use ferrite beads or common-mode chokes to suppress high-frequency noise on power lines or cables
  • Use LC or RC filters to attenuate specific frequency ranges
• Consider the use of shielding cans or compartments for critical components or circuits
  • Place sensitive or noisy components inside shielded compartments
  • Ensure proper grounding and sealing of shielding cans

EMC Testing and Compliance

• Perform EMC testing to verify compliance with relevant standards and ensure electromagnetic compatibility
• Conduct pre-compliance testing during the design phase to identify and address potential EMC issues early
  • Use EMI scanning tools or near-field probes to locate sources of emissions
  • Perform preliminary radiated and conducted emissions tests using spectrum analyzers or EMI receivers
• Perform formal compliance testing at an accredited EMC testing laboratory
  • Conduct radiated and conducted emissions tests according to the applicable standards (FCC, CISPR, etc.)
  • Perform immunity tests to ensure the device can withstand external EMI without malfunction
• Document the test setup, procedures, and results in an EMC test report
  • Include descriptions of the test equipment, test conditions, and measurement data
  • Provide evidence of compliance with the relevant EMC standards
• Address any non-compliances identified during testing by modifying the PCB design or implementing additional EMI mitigation techniques
• Obtain EMC certification or declaration of conformity as required by the target market or application
• Maintain EMC compliance throughout the product lifecycle by controlling design changes and manufacturing processes

Advanced PCB Design Considerations

• Consider advanced PCB design techniques to further improve EMC performance
• Use multi-layer PCBs to provide better shielding, grounding, and power distribution
  • Dedicate layers for ground, power, and signal routing
  • Use blind and buried vias to minimize trace lengths and layer transitions
• Implement high-speed design techniques for signals with fast rise times or high frequencies
  • Use controlled-impedance traces and matching terminations
  • Minimize stubs and unterminated traces to prevent reflections and ringing
• Use advanced routing techniques, such as serpentine traces or stitching capacitors, to match trace lengths and minimize skew
• Implement spread-spectrum clocking or frequency dithering to reduce peak EMI levels
  • Modulate the clock frequency slightly to spread the energy over a wider bandwidth
  • Use dedicated spread-spectrum clock generators or configure spread-spectrum settings in the IC
• Consider the use of EMI suppression components, such as common-mode chokes, ferrite beads, or EMI filters, to reduce emissions
  • Place these components near the source of EMI or at the interface between the PCB and external connections
• Optimize the PCB stackup and material selection for EMC performance
  • Choose PCB materials with appropriate dielectric constant and loss tangent for the frequency range of interest
  • Use asymmetric stackups or offset striplines to minimize crosstalk and coupling
• Perform signal integrity simulations and EMI analysis during the design phase to predict and optimize EMC performance
  • Use tools like SPICE, S-parameter simulators, or field solvers to analyze signal integrity and EMI
  • Perform what-if analyses to evaluate the impact of design changes on EMC